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NLSX4378 4-Bit 20 Mb/s Dual-Supply Level Translator
The NLSX4378 is a 4-bit configurable dual-supply bidirectional auto sensing translator that does not require a directional control pin. The VCC I/O and VL I/O ports are designed to track two different power supply rails, VCC and VL respectively. The VCC supply rail is configurable from 1.65 V to 5.5 V while VL supply rail is configurable to 1.65 V to 5.5 V. This allows voltage logic signals on the VL side to be translated into lower, higher or equal value voltage logic signals on the VCC side, and vice-versa. The NLSX4378 translator has open-drain outputs with integrated 10 kW pullup resistors on the I/O lines. The integrated pullup resistors are used to pullup the I/O lines to either VL or VCC. The NLSX4378 is an excellent match for open-drain applications such as the I2C communication bus.
Features http://onsemi.com MARKING DIAGRAM
mBump12 FC SUFFIX CASE 499AU A Y WW G 4378F AYWW G
= Assembly Location = Year = Work Week = Pb-Free Package
* VL can be Less than, Greater than or Equal to VCC * Wide VCC Operating Range: 1.65 V to 5.5 V * * * * * * *
Wide VL Operating Range: 1.65 V to 5.5 V High-Speed with 20 Mb/s Guaranteed Date Rate Low Bit-to-Bit Skew Enable Input and I/O Lines have Overvoltage Tolerant (OVT) to 5.5 V Nonpreferential Powerup Sequencing Integrated 10 kW Pullup Resistors Small Space Saving Package - 2.02 x 1.54 mm mBump12 This is a Pb-Free Device
LOGIC DIAGRAM
EN VL VCC GND
I/O VL1
I/O VCC1
I/O VL2
I/O VCC2
Typical Applications
I/O VL3
I/O VCC3
* I2C, SMBus, PMBus * Low Voltage ASIC Level Translation * Mobile Phones, PDAs, Cameras
I/O VL4
I/O VCC4
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2009
April, 2009 - Rev. 2
1
Publication Order Number: NLSX4378/D
NLSX4378
VL VCC
PU1
One-Shot Block Gate Bias
One-Shot Block
PU2
RPullup 10 kW
RPullup 10 kW
I/O VL
N
I/O VCC
Figure 1. Block Diagram (1 I/O Line) PIN ASSIGNMENT
Pins VCC VL GND EN I/O VCCn I/O VLn Description VCC Input Voltage VL Input Voltage Ground Output Enable VCC I/O Port, Referenced to VCC VL I/O Port, Referenced to VL
PIN LOCATION
Pin A1 A2 A3 A4 B1 B2 B3 Operating Mode Hi-Z I/O Buses Connected B4 C1 C2 C3 C4 Pin Name I/O VL1 I/O VL2 I/O VL3 I/O VL4 VCC VL EN GND I/O VCC1 I/O VCC2 I/O VCC3 I/O VCC4
FUNCTION TABLE
EN L H
(2.02 x 1.54 mm) A 1 I/O VL1 2 I/O VL2 3 I/O VL3 4 I/O VL4 GND I/O VCC4 (Bottom View) EN I/O VCC3 VL I/O VCC2 VCC I/O VCC1 B C
mBump12
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NLSX4378
MAXIMUM RATINGS
Symbol VCC VL I/O VCC I/O VL VEN II/O_SC TSTG Parameter High-side DC Supply Voltage High-side DC Supply Voltage VCC-Referenced DC Input/Output Voltage VL-Referenced DC Input/Output Voltage Enable Control Pin DC Input Voltage Short-Circuit Duration (I/O VL and I/O VCC to GND) Storage Temperature Continuous Condition Value -0.3 to +7.0 -0.3 to +7.0 -0.3 to (VCC + 0.3) -0.3 to (VL + 0.3) -0.3 to +7.0 40 -65 to +150 Unit V V V V V mA C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VL VEN VIO TA Parameter High-side Positive DC Supply Voltage High-side Positive DC Supply Voltage Enable Control Pin Voltage Enable Control Pin Voltage Operating Temperature Range Min 1.65 1.65 GND GND -40 Max 5.5 5.5 5.5 5.5 +85 Unit V V V V C
DC ELECTRICAL CHARACTERISTICS (VCC = 1.65 V to 5.5 V and VL = 1.65 V to 5.5 V, unless otherwise specified)
-405C to +855C Symbol VIHC VILC VIHL VILL VIH VIL VOHC VOLC VOHL VOLL IQVCC IQVL ITS-VCC ITS-VL IOZ RPU Parameter I/O VCC Input HIGH Voltage I/O VCC Input LOW Voltage I/O VL Input HIGH Voltage I/O VL Input LOW Voltage Control Pin Input HIGH Voltage Control Pin Input LOW Voltage I/O VCC Output HIGH Voltage I/O VCC Output LOW Voltage I/O VL Output HIGH Voltage I/O VL Output LOW Voltage VCC Supply Current VL Supply Current VCC Tristate Output Mode Supply Current VL Tristate Output Mode Supply Current I/O Tristate Output Mode Leakage Current Pullup Resistor I/O VL and VCC I/O VCC Source Current = 20 mA I/O VCC Sink Current = 1.0 mA I/O_VL 0.15 V I/O VL Source Current = 20 mA I/O VL Sink Current = 1.0 mA I/O_VCC 0.15 V I/O VCC and I/O VL Unconnected, VEN = VL I/O VCC and I/O VL Unconnected, VEN = VL I/O VCC and I/O VL Unconnected, VEN = GND I/O VCC and I/O VL Unconnected, VEN = GND TA = +25C TA = +25C Test Conditions Min VCC - 0.4 - VL - 0.4 - 0.65 * VL - 0.8 * VCC - 0.8 * VL - - - - - - - Typ (Notes 1, 2) - - - - - - - - - - 0.5 0.3 0.1 0.1 0.1 10 Max - 0.15 - 0.15 - 0.35 * VL - 0.4 - 0.4 2.0 1.0 1.0 1.0 1.0 - Unit V V V V V V V V V V mA mA mA mA mA kW
1. Typical values are for VCC = +2.8 V, VL = +1.8 V and TA = +25C. 2. All units are production tested at TA = +25C. Limits over the operating temperature range are guaranteed by design.
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NLSX4378
TIMING CHARACTERISTICS - RAIL-TO-RAIL DRIVING CONFIGURATIONS
(I/O test circuit of Figures 2 and 3, CLOAD = 15 pF, driver output impedance v 50 W, RLOAD = 1 MW) -405C to +855C (Note 3) Symbol VL = 1.65 V, VCC = 5.5 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 20 15 20 30 10 20 20 5 ns ns ns ns ns ns nS Mb/s Parameter Test Conditions Min Typ Max Unit
VL = 1.8 V, VCC = 2.8 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 20 15 15 25 10 15 15 5 ns ns ns ns ns ns nS Mb/s
VL = 2.5 V, VCC = 3.6 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 20 15 10 15 10 15 15 5 ns ns ns ns ns ns nS Mb/s
VL = 2.8 V, VCC = 1.8 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 20 25 10 20 15 15 15 5 ns ns ns ns ns ns nS Mb/s
3. All units are production tested at TA = +25C. Limits over the operating temperature range are guaranteed by design.
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NLSX4378
TIMING CHARACTERISTICS - RAIL-TO-RAIL DRIVING CONFIGURATIONS
(I/O test circuit of Figures 2 and 3, CLOAD = 15 pF, driver output impedance v 50 W, RLOAD = 1 MW) -405C to +855C (Note 3) Symbol VL = 3.6 V, VCC = 2.5 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 20 15 10 15 15 15 15 5 ns ns ns ns ns ns nS Mb/s Parameter Test Conditions Min Typ Max Unit
VL = 5.5 V, VCC = 1.65 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 20 30 10 15 20 20 20 5 ns ns ns ns ns ns nS Mb/s
3. All units are production tested at TA = +25C. Limits over the operating temperature range are guaranteed by design.
TIMING CHARACTERISTICS - OPEN DRAIN DRIVING CONFIGURATIONS
(I/O test circuit of Figures 4 and 5, CLOAD = 15 pF, driver output impedance v 50 W, RLOAD = 1 MW) -405C to +855C (Note 4) Symbol +1.65 v VL, VCC v +5.5 V tRVCC tFVCC tRVL tFVL tPDVL-VCC tPDVCC-VL tPPSKEW MDR I/O VCC Risetime I/O VCC Falltime I/O VL Risetime I/O VL Falltime Propagation Delay (Driving I/O VL) Propagation Delay (Driving I/O VCC) Part-to-Part Skew Maximum Data Rate 2 400 50 400 60 1000 1000 50 ns ns ns ns ns ns nS Mb/s Parameter Test Conditions Min Typ Max Unit
4. All units are production tested at TA = +25C. Limits over the operating temperature range are guaranteed by design. Limits over the operating temperature range are guaranteed by design.
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NLSX4378
TEST SETUPS
VL EN Source I/O VL
NLSX4378
VCC I/O VCC CLOAD RLOAD I/O VL
VL EN
NLSX4378
VCC I/O VCC
CLOAD RLOAD Source
Figure 2. Rail-to-Rail Driving I/O VL
Figure 3. Rail-to-Rail Driving I/O VCC
VL EN I/O VL
NLSX4378
VCC I/O VCC CLOAD RLOAD
VL EN VCC CLOAD RLOAD
NLSX4378
VCC I/O VCC
Figure 4. Open-Drain Driving I/O VL
Figure 5. Open-Drain Driving I/O VCC
I/O VL 90% 50% 10% tPD_VL-VCC I/O VCC 90% 50% 10%
tRISE/FALL v 3 ns
I/O VCC 90% 50% 10% tPD_VL-VCC tPD_VCC-VL I/O VL 90% 50% 10%
tRISE/FALL v 3 ns
tPD_VCC-VL
tF-VCC
tR-VCC
tF-VL
tR-VL
Figure 6. Definition of Timing Specification Parameters
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NLSX4378
VCC R1 CL RL 2xVCC OPEN
PULSE GENERATOR RT
DUT
Test tPZH, tPHZ tPZL, tPLZ
Switch Open 2 x VCC
CL = 15 pF or equivalent (Includes jig and probe capacitance) RL = R1 = 50 kW or equivalent RT = ZOUT of pulse generator (typically 50 W)
Figure 7. Test Circuit for Enable/Disable Time Measurement
tR Input tPLH Output 90% 50% 10% 90% 50% 10% tR tPHL tF 50% VL GND HIGH IMPEDANCE 10% 90% VOL VOH HIGH IMPEDANCE
VCC GND
EN
tPZL Output 50% tPZH Output 50%
tPLZ
tF
tPHZ
Figure 8. Timing Definitions for Propagation Delays and Enable/Disable Measurement
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NLSX4378
APPLICATIONS INFORMATION
Level Translator Architecture
The NLSX4378 auto sense translator provides bi-directional voltage level shifting to transfer data in multiple supply voltage systems. This device has two supply voltages, VL and VCC, which set the logic levels on the input and output sides of the translator. When used to transfer data from the VL to the VCC ports, input signals referenced to the VL supply are translated to output signals with a logic level matched to VCC. In a similar manner, the VCC to VL translation shifts input signals with a logic level compatible to VCC to an output signal matched to VL. The NLSX4378 consists of two bi-directional channels that independently determine the direction of the data flow without requiring a directional pin. The one-shot circuits are used to detect the rising or falling input signals. In addition, the one shots decrease the rise and fall time of the output signal for high-to-low and low-to-high transitions. Each input/output channel has an internal 10 kW pull. The magnitude of the pullup resistors can be reduced by connecting external resistors in parallel to the internal 10 kW resistors.
Input Driver Requirements
parameters listed in the data sheet assume that the output impedance of the drivers connected to the translator is less than 50 kW.
Enable Input (EN)
The NLSX4378 has an Enable pin (EN) that provides tri-state operation at the I/O pins. Driving the Enable pin to a low logic level minimizes the power consumption of the device and drives the I/O VCC and I/O VL pins to a high impedance state. Normal translation operation occurs when the EN pin is equal to a logic high signal. The EN pin is referenced to the VL supply and has Overvoltage Tolerant (OVT) protection.
Power Supply Guidelines
The rise (tR) and fall (tF) timing parameters of the open drain outputs depend on the magnitude of the pull-up resistors. In addition, the propagation times (tPD), skew (tPSKEW) and maximum data rate depend on the impedance of the device that is connected to the translator. The timing
ORDERING INFORMATION
Device NLSX4378FCT1G NLSX4378BFCT1G Package mBump12 (Pb-Free)
During normal operation, supply voltage VL can be greater than, less than or equal to VCC. The sequencing of the power supplies will not damage the device during the power up operation. For optimal performance, 0.01 mF to 0.1 mF decoupling capacitors should be used on the VL and VCC power supply pins. Ceramic capacitors are a good design choice to filter and bypass any noise signals on the voltage lines to the ground plane of the PCB. The noise immunity will be maximized by placing the capacitors as close as possible to the supply and ground pins, along with minimizing the PCB connection traces.
Shipping 3000 / Tape & Reel 3000 / Tape & Reel
mBump12 (Backside Laminate Coating) (Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NLSX4378
PACKAGE DIMENSIONS
mBump12, 2.02x1.54, 0.5P CASE 499AU-01 ISSUE O
D
PIN A1 REFERENCE 2X
A
B
E 0.10 C
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. DIM A A1 A2 b D D1 E E1 e MILLIMETERS MIN MAX 0.66 --- 0.21 0.27 0.33 0.39 0.29 0.34 2.02 BSC 1.50 BSC 1.54 BSC 1.00 BSC 0.50 BSC
2X
0.10 C
TOP VIEW A A2 A1
0.10 C
12X
0.05 C
NOTE 3
SIDE VIEW D1 e/2 e
C B A 1 2 3 4
C
SEATING PLANE
12X
b
0.05 C A B 0.03 C
E1
BOTTOM VIEW
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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